versatile express 主板/母板μatx用户手册 -金沙js1005线路

主板 express uatx（或 v2m-p1）是 versatile express 系列中的第一款可用主板。它嵌在 uatx 大小的两件式漂亮塑料外壳内。活动式壳盖可以露出主板以便安装子板和连接测试设备。所有连接器和控制器都安装在后面板上。  

此主板有两组子板牛角连接器。它必须始终与处理器子板 express 或软宏模型子板配对使用以提供主系统处理器。可以添加可选的逻辑子板 express 板以提供自定义 ip 开发和验证功能。

• 配备各种有用的外设接口
• 适用于 versatile express 子板的拖放式 usb 驱动器配置机制
• 功能强大的启动监视器程序可以配置子板并启动应用软件映像
• 单元预先装载了 debian linux 安装程序
• 可以通过 rs232 端口远程控制系统电源并重置信号
• 紧凑独立的系统，携带方便并适合进行展示或客户部署

contents
motherboard express μatx technical reference manual

preface
about this book .......................................................................................................... vii
feedback .................................................................................................................... xi
chapter 1 introduction
1.1 about the motherboard express μatx .................................................................... 1-2
1.2 precautions .............................................................................................................. 1-5
chapter 2 hardware description
2.1 motherboard architecture and buses ....................................................................... 2-2
2.2 power up, on/off and reset signals .......................................................................... 2-6
2.3 clock architecture .................................................................................................... 2-9
2.4 power ..................................................................................................................... 2-11
2.5 peripherals and interfaces on the motherboard ..................................................... 2-12
2.6 interrupt signals ..................................................................................................... 2-18
2.7 dma signals ........................................................................................................... 2-20
2.8 jtag and test connectors ..................................................................................... 2-21
chapter 3 configuration
3.1 configuration environment ....................................................................................... 3-2
chapter 4 programmers model
4.1 about this programmers model ................................................................................ 4-2
4.2 memory maps .......................................................................................................... 4-3
4.3 register summary .................................................................................................... 4-8
4.4 register descriptions ............................................................................................. 4-10
4.5 io peripherals and interfaces ................................................................................ 4-26
appendix a signal descriptions
a.1 audio codec interface ........................................................................................... a-2
a.2 uart interface ........................................................................................................ a-3
appendix b specifications
b.1 timing specifications ............................................................................................... b-2
b.2 electrical specification ............................................................................................. b-7
appendix c revisions